#ifndef __BASEA_SPACE_H__
#define __BASEA_SPACE_H__
#include "dev_udsp_field.h"
#include "dev_dmac_field.h"
#include "dev_npu_field.h"
#include "dev_memc_field.h"
#include "dev_cache_field.h"
#include "dev_norc_field.h"
#include "dev_mpu_field.h"
#include "psram_rwc_field.h"
#include "dev_chip_field.h"
#include "dev_cmu_field.h"
#include "dev_rmu_field.h"
#include "dev_wfi_field.h"
#include "dev_ureg_field.h"
#include "dev_global_field.h"
#include "dev_timer_field.h"
#include "dev_efuse_field.h"
#include "aon_osc_field.h"
#include "aon_pll_field.h"
#include "aon_cmu_field.h"
#include "aon_pmu_field.h"
#include "aon_rmu_field.h"
#include "aon_gpio_field.h"
#include "aon_mem_field.h"
#include "aon_global_field.h"
#include "aon_lradc_field.h"
#include "aon_audi_field.h"
#include "dev_spin_field.h"
#include "dev_pwm_field.h"
#include "dev_camera_field.h"
#include "dev_uartn_field.h"
#include "dev_iicn_field.h"
#include "dev_asin_field.h"
#include "ir_rx_field.h"
#include "dev_adc_field.h"
#include "dev_dac_field.h"
#include "dev_src_field.h"
#include "dev_gpio_field.h"

#include "csr_mmu.h"
#include "dev_udsp.h"
#include "dev_dmac.h"
#include "dev_npu.h"
#include "dev_memc.h"
#include "dev_cache.h"
#include "dev_norc.h"
#include "dev_mpu.h"
#include "psram_rwc.h"
#include "dev_chip.h"
#include "dev_cmu.h"
#include "dev_rmu.h"
#include "dev_wfi.h"
#include "dev_ureg.h"
#include "dev_global.h"
#include "dev_timer.h"
#include "dev_efuse.h"
#include "aon_osc.h"
#include "aon_pll.h"
#include "aon_cmu.h"
#include "aon_pmu.h"
#include "aon_rmu.h"
#include "aon_gpio.h"
#include "aon_mem.h"
#include "aon_global.h"
#include "aon_lradc.h"
#include "aon_audi.h"
#include "dev_spin.h"
#include "dev_pwm.h"
#include "dev_camera.h"
#include "dev_uartn.h"
#include "dev_iicn.h"
#include "dev_asin.h"
#include "ir_rx.h"
#include "dev_adc.h"
#include "dev_dac.h"
#include "dev_src.h"
#include "dev_gpio.h"

#define   CSR_MMU_BASE                       _IO_((uint32_t)0x0)
#define   DEV_UDSP_BASE                      _IO_((uint32_t)0x20180000)
#define   DEV_DMAC_BASE                      _IO_((uint32_t)0x20020000)
#define   DEV_NPU_BASE                       _IO_((uint32_t)0x20190000)
#define   DEV_MEMC_BASE                      _IO_((uint32_t)0x20030000)
#define   DEV_CACHE_BASE                     _IO_((uint32_t)0x201a0000)
#define   DEV_NORC_BASE                      _IO_((uint32_t)0x20090000)
#define   DEV_MPU_BASE                       _IO_((uint32_t)0x201e0000)
#define   PSRAM_RWC_BASE                     _IO_((uint32_t)0x201d0000)
#define   DEV_CHIP_BASE                      _IO_((uint32_t)0x20000000)
#define   DEV_CMU_BASE                       _IO_((uint32_t)0x20002000)
#define   DEV_RMU_BASE                       _IO_((uint32_t)0x20003000)
#define   DEV_WFI_BASE                       _IO_((uint32_t)0x20005000)
#define   DEV_UREG_BASE                      _IO_((uint32_t)0x20006000)
#define   DEV_GLOBAL_BASE                    _IO_((uint32_t)0x20008000)
#define   DEV_TIMER_BASE                     _IO_((uint32_t)0x20010000)
#define   DEV_EFUSE_BASE                     _IO_((uint32_t)0x20160000)
#define   AON_OSC_BASE                       _IO_((uint32_t)0x21000000)
#define   AON_PLL_BASE                       _IO_((uint32_t)0x21001000)
#define   AON_CMU_BASE                       _IO_((uint32_t)0x21002000)
#define   AON_PMU_BASE                       _IO_((uint32_t)0x21004000)
#define   AON_RMU_BASE                       _IO_((uint32_t)0x21003000)
#define   AON_GPIO_BASE                      _IO_((uint32_t)0x21005000)
#define   AON_MEM_BASE                       _IO_((uint32_t)0x21006000)
#define   AON_GLOBAL_BASE                    _IO_((uint32_t)0x21008000)
#define   AON_LRADC_BASE                     _IO_((uint32_t)0x21010000)
#define   AON_AUDI_BASE                      _IO_((uint32_t)0x21020000)
#define   DEV_SPI0_BASE                      _IO_((uint32_t)0x200a0000)
#define   DEV_SPI1_BASE                      _IO_((uint32_t)0x200b0000)
#define   DEV_PWM_BASE                       _IO_((uint32_t)0x20100000)
#define   DEV_CAMERA_BASE                    _IO_((uint32_t)0x201b0000)
#define   DEV_UART0_BASE                     _IO_((uint32_t)0x20040000)
#define   DEV_UART1_BASE                     _IO_((uint32_t)0x20050000)
#define   DEV_UART2_BASE                     _IO_((uint32_t)0x20060000)
#define   DEV_UART3_BASE                     _IO_((uint32_t)0x201c0000)
#define   DEV_IIC0_BASE                      _IO_((uint32_t)0x20070000)
#define   DEV_IIC1_BASE                      _IO_((uint32_t)0x20080000)
#define   DEV_ASI0_BASE                      _IO_((uint32_t)0x20140000)
#define   DEV_ASI1_BASE                      _IO_((uint32_t)0x20150000)
#define   IR_RX_BASE                         _IO_((uint32_t)0x200e0000)
#define   DEV_ADC_BASE                       _IO_((uint32_t)0x20120000)
#define   DEV_DAC_BASE                       _IO_((uint32_t)0x20130000)
#define   DEV_SRC_BASE                       _IO_((uint32_t)0x20170000)
#define   DEV_GPIO_BASE                      _IO_((uint32_t)0x20110000)

// #define   CSR_MMU                   ((CSR_MMU_RegDef *) CSR_MMU_BASE)
// #define   DEV_UDSP                ((DEV_UDSP_RegDef_f *) DEV_UDSP_BASE)
// #define   DEV_DMAC                ((DEV_DMAC_RegDef_f *) DEV_DMAC_BASE)
// #define   DEV_NPU                   ((DEV_NPU_RegDef_f *) DEV_NPU_BASE)
// #define   DEV_MEMC                ((DEV_MEMC_RegDef_f *) DEV_MEMC_BASE)
// #define   DEV_CACHE             ((DEV_CACHE_RegDef_f *) DEV_CACHE_BASE)
// #define   DEV_NORC                ((DEV_NORC_RegDef_f *) DEV_NORC_BASE)
// #define   DEV_MPU                   ((DEV_MPU_RegDef_f *) DEV_MPU_BASE)
// #define   PSRAM_RWC             ((PSRAM_RWC_RegDef_f *) PSRAM_RWC_BASE)
// #define   DEV_CHIP                ((DEV_CHIP_RegDef_f *) DEV_CHIP_BASE)
// #define   DEV_CMU                   ((DEV_CMU_RegDef_f *) DEV_CMU_BASE)
// #define   DEV_RMU                   ((DEV_RMU_RegDef_f *) DEV_RMU_BASE)
// #define   DEV_WFI                   ((DEV_WFI_RegDef_f *) DEV_WFI_BASE)
// #define   DEV_UREG                ((DEV_UREG_RegDef_f *) DEV_UREG_BASE)
// #define   DEV_GLOBAL          ((DEV_GLOBAL_RegDef_f *) DEV_GLOBAL_BASE)
// #define   DEV_TIMER             ((DEV_TIMER_RegDef_f *) DEV_TIMER_BASE)
// #define   DEV_EFUSE             ((DEV_EFUSE_RegDef_f *) DEV_EFUSE_BASE)
// #define   AON_OSC                   ((AON_OSC_RegDef_f *) AON_OSC_BASE)
// #define   AON_PLL                   ((AON_PLL_RegDef_f *) AON_PLL_BASE)
// #define   AON_CMU                   ((AON_CMU_RegDef_f *) AON_CMU_BASE)
// #define   AON_PMU                   ((AON_PMU_RegDef_f *) AON_PMU_BASE)
// #define   AON_RMU                   ((AON_RMU_RegDef_f *) AON_RMU_BASE)
// #define   AON_GPIO                ((AON_GPIO_RegDef_f *) AON_GPIO_BASE)
// #define   AON_MEM                   ((AON_MEM_RegDef_f *) AON_MEM_BASE)
// #define   AON_GLOBAL          ((AON_GLOBAL_RegDef_f *) AON_GLOBAL_BASE)
// #define   AON_LRADC             ((AON_LRADC_RegDef_f *) AON_LRADC_BASE)
// #define   AON_AUDI                ((AON_AUDI_RegDef_f *) AON_AUDI_BASE)
// #define   DEV_SPI0                ((DEV_SPIn_RegDef_f *) DEV_SPI0_BASE)
// #define   DEV_SPI1                ((DEV_SPIn_RegDef_f *) DEV_SPI1_BASE)
// #define   DEV_PWM                   ((DEV_PWM_RegDef_f *) DEV_PWM_BASE)
// #define   DEV_CAMERA          ((DEV_CAMERA_RegDef_f *) DEV_CAMERA_BASE)
// #define   DEV_UART0             ((DEV_UARTn_RegDef_f *) DEV_UART0_BASE)
// #define   DEV_UART1             ((DEV_UARTn_RegDef_f *) DEV_UART1_BASE)
// #define   DEV_UART2             ((DEV_UARTn_RegDef_f *) DEV_UART2_BASE)
// #define   DEV_UART3             ((DEV_UARTn_RegDef_f *) DEV_UART3_BASE)
// #define   DEV_IIC0                ((DEV_IICn_RegDef_f *) DEV_IIC0_BASE)
// #define   DEV_IIC1                ((DEV_IICn_RegDef_f *) DEV_IIC1_BASE)
// #define   DEV_ASI0                ((DEV_ASIn_RegDef_f *) DEV_ASI0_BASE)
// #define   DEV_ASI1                ((DEV_ASIn_RegDef_f *) DEV_ASI1_BASE)
// #define   IR_RX                         ((IR_RX_RegDef_f *) IR_RX_BASE)
// #define   DEV_ADC                   ((DEV_ADC_RegDef_f *) DEV_ADC_BASE)
// #define   DEV_DAC                   ((DEV_DAC_RegDef_f *) DEV_DAC_BASE)
// #define   DEV_SRC                   ((DEV_SRC_RegDef_f *) DEV_SRC_BASE)
// #define   DEV_GPIO                ((DEV_GPIO_RegDef_f *) DEV_GPIO_BASE)
#endif
