#ifndef __DEV_NORC_FIELD_H__
#define __DEV_NORC_FIELD_H__

#include "sp2cw3.h"
/*******************************************************************************
 * Auto-generated Content
 ******************************************************************************/


/***********************************CTL***********************************/
typedef struct
{

    __IO uint32_t SPI_WIDTH           : 2;
    __IO uint32_t ADR_MODE            : 1;
    __IO uint32_t FAST_MODE           : 1;
    __IO uint32_t DIO_MODE            : 1;
    __IO uint32_t DDR_MODE            : 1;
    __IO uint32_t WAIT_CYCLE          : 2;
    __IO uint32_t DUMY_CYCLE          : 4;
    __IO uint32_t DELAY_CHAIN         : 5;
    __IO uint32_t HOLD_MODE           : 1;
    __IO uint32_t HOLD_CYCLE          : 2;
    __IO uint32_t STOP_CYCLE          : 2;
    __IO uint32_t SPI_MODE            : 2;
    __IO uint32_t NOR_WAIT            : 1;
    __IO uint32_t PREF_EN             : 1;
    __IO uint32_t PREF_MODE           : 1;
    __IO uint32_t UNCA_CONT           : 1;
    __IO uint32_t CACH_CONT           : 1;
    __IO uint32_t SOFT_CONT           : 1;
    __IO uint32_t DUAL_DEPTH          : 1;
    __IO uint32_t DUAL_WIDTH          : 1;
} DEV_NORC_CTL_Field;
/****DEV_NORCCTL end****/

/***********************************SOFT_CTL***********************************/
typedef struct
{

    __IO uint32_t SOFT_STA            : 1;
    __IO uint32_t BUFF_CLR            : 1;
    __IO uint32_t CMD_STA             : 1;
    __IO uint32_t CMD_NSS             : 1;
    __IO uint32_t CMD_DAT             : 8;
    uint32_t RESERVED0           : 20;
} DEV_NORC_SOFT_CTL_Field;
/****DEV_NORCSOFT_CTL end****/

/***********************************SOFT_STA***********************************/
typedef struct
{

    __I  uint32_t FIFO_LEVEL          : 4;
    __I  uint32_t EMPTY               : 1;
    __I  uint32_t BUS_IDLE            : 1;
    uint32_t RESERVED0           : 26;
} DEV_NORC_SOFT_STA_Field;
/****DEV_NORCSOFT_STA end****/

/***********************************SOFT_BASE***********************************/
typedef struct
{

    __IO uint32_t BASE_ADDR           : 26;
    uint32_t RESERVED0           : 6;
} DEV_NORC_SOFT_BASE_Field;
/****DEV_NORCSOFT_BASE end****/

/***********************************SOFT_LEN***********************************/
typedef struct
{

    __IO uint32_t LENGTH              : 26;
    uint32_t RESERVED0           : 6;
} DEV_NORC_SOFT_LEN_Field;
/****DEV_NORCSOFT_LEN end****/

/***********************************SOFT_CNT***********************************/
typedef struct
{

    __I  uint32_t COUNTER             : 26;
    uint32_t RESERVED0           : 6;
} DEV_NORC_SOFT_CNT_Field;
/****DEV_NORCSOFT_CNT end****/

/***********************************SOFT_DATA***********************************/
typedef struct
{

    __I  uint32_t DATA                : 32;
} DEV_NORC_SOFT_DATA_Field;
/****DEV_NORCSOFT_DATA end****/

/***********************************SOFT_PD***********************************/
typedef struct
{

    __IO uint32_t BLOCK_PD            : 1;
    __IO uint32_t LENGTH_PD           : 1;
    __IO uint32_t FIFO_UF_PD          : 1;
    uint32_t RESERVED0           : 29;
} DEV_NORC_SOFT_PD_Field;
/****DEV_NORCSOFT_PD end****/

/***********************************SOFT_IE***********************************/
typedef struct
{

    __IO uint32_t BLOCK_IE            : 1;
    __IO uint32_t LENGTH_IE           : 1;
    __IO uint32_t FIFO_UF_IE          : 1;
    uint32_t RESERVED0           : 13;
    __IO uint32_t DMA_EN              : 1;
    uint32_t RESERVED1           : 15;
} DEV_NORC_SOFT_IE_Field;
/****DEV_NORCSOFT_IE end****/

/***********************************ENCRY_CTL***********************************/
typedef struct
{

    __IO uint32_t EN0                 : 1;
    __IO uint32_t EN1                 : 1;
    uint32_t RESERVED0           : 3;
    __IO uint32_t ALG                 : 1;
    uint32_t RESERVED1           : 26;
} DEV_NORC_ENCRY_CTL_Field;
/****DEV_NORCENCRY_CTL end****/

/***********************************ENCRY_SEED***********************************/
typedef struct
{

    __O  uint32_t SEED                : 32;
} DEV_NORC_ENCRY_SEED_Field;
/****DEV_NORCENCRY_SEED end****/

/***********************************ENCRY_BASE0***********************************/
typedef struct
{

    uint32_t RESERVED0           : 12;
    __IO uint32_t ADDR                : 14;
    uint32_t RESERVED1           : 6;
} DEV_NORC_ENCRY_BASE0_Field;
/****DEV_NORCENCRY_BASE0 end****/

/***********************************ENCRY_END0***********************************/
typedef struct
{

    uint32_t RESERVED0           : 12;
    __IO uint32_t ADDR                : 14;
    uint32_t RESERVED1           : 6;
} DEV_NORC_ENCRY_END0_Field;
/****DEV_NORCENCRY_END0 end****/

/***********************************ENCRY_BASE1***********************************/
typedef struct
{

    uint32_t RESERVED0           : 12;
    __IO uint32_t ADDR                : 14;
    uint32_t RESERVED1           : 6;
} DEV_NORC_ENCRY_BASE1_Field;
/****DEV_NORCENCRY_BASE1 end****/

/***********************************ENCRY_END1***********************************/
typedef struct
{

    uint32_t RESERVED0           : 12;
    __IO uint32_t ADDR                : 14;
    uint32_t RESERVED1           : 6;
} DEV_NORC_ENCRY_END1_Field;
/****DEV_NORCENCRY_END1 end****/

/***********************************PERF_CTL***********************************/
typedef struct
{

    __IO uint32_t EN                  : 1;
    __IO uint32_t STA                 : 1;
    __IO uint32_t SEL                 : 1;
    uint32_t RESERVED0           : 29;
} DEV_NORC_PERF_CTL_Field;
/****DEV_NORCPERF_CTL end****/

/***********************************PERF_SUM***********************************/
typedef struct
{

    __I  uint32_t DATA                : 32;
} DEV_NORC_PERF_SUM_Field;
/****DEV_NORCPERF_SUM end****/

/***********************************PERF_CNT***********************************/
typedef struct
{

    __I  uint32_t DATA                : 32;
} DEV_NORC_PERF_CNT_Field;
/****DEV_NORCPERF_CNT end****/

/***********************************DEV_NORC register***********************************/
typedef struct
{

    union
    {
        __IO    uint32_t    CTL;                                     /* 0x0    NORCTRL Control */
        DEV_NORC_CTL_Field    CTL_f;
    };
    union
    {
        __IO    uint32_t    SOFT_CTL;                                /* 0x4    Software Control */
        DEV_NORC_SOFT_CTL_Field    SOFT_CTL_f;
    };
    union
    {
        __I     uint32_t    SOFT_STA;                                /* 0x8    Software STATUS */
        DEV_NORC_SOFT_STA_Field    SOFT_STA_f;
    };
    union
    {
        __IO    uint32_t    SOFT_BASE;                               /* 0xc    Software Base Address */
        DEV_NORC_SOFT_BASE_Field    SOFT_BASE_f;
    };
    union
    {
        __IO    uint32_t    SOFT_LEN;                                /* 0x10    Software Length */
        DEV_NORC_SOFT_LEN_Field    SOFT_LEN_f;
    };
    union
    {
        __I     uint32_t    SOFT_CNT;                                /* 0x14    Software Counter */
        DEV_NORC_SOFT_CNT_Field    SOFT_CNT_f;
    };
    union
    {
        __I     uint32_t    SOFT_DATA;                               /* 0x18    Software Data */
        DEV_NORC_SOFT_DATA_Field    SOFT_DATA_f;
    };
    uint32_t    RESERVED0;
    union
    {
        __IO    uint32_t    SOFT_PD;                                 /* 0x20    Software Pending */
        DEV_NORC_SOFT_PD_Field    SOFT_PD_f;
    };
    union
    {
        __IO    uint32_t    SOFT_IE;                                 /* 0x24    Software Interrupt Enable */
        DEV_NORC_SOFT_IE_Field    SOFT_IE_f;
    };
    uint32_t    RESERVED1[2];
    union
    {
        __IO    uint32_t    ENCRY_CTL;                               /* 0x30    Encrypt Control */
        DEV_NORC_ENCRY_CTL_Field    ENCRY_CTL_f;
    };
    union
    {
        __O     uint32_t    ENCRY_SEED;                              /* 0x34    Encrypt Seed */
        DEV_NORC_ENCRY_SEED_Field    ENCRY_SEED_f;
    };
    union
    {
        __IO    uint32_t    ENCRY_BASE0;                             /* 0x38    Encrypt Area0 Start Address */
        DEV_NORC_ENCRY_BASE0_Field    ENCRY_BASE0_f;
    };
    union
    {
        __IO    uint32_t    ENCRY_END0;                              /* 0x3c    Encrypt Area0 End Address */
        DEV_NORC_ENCRY_END0_Field    ENCRY_END0_f;
    };
    union
    {
        __IO    uint32_t    ENCRY_BASE1;                             /* 0x40    Encrypt Area1 Start Address */
        DEV_NORC_ENCRY_BASE1_Field    ENCRY_BASE1_f;
    };
    union
    {
        __IO    uint32_t    ENCRY_END1;                              /* 0x44    Encrypt Area1 End Address */
        DEV_NORC_ENCRY_END1_Field    ENCRY_END1_f;
    };
    uint32_t    RESERVED2[2];
    union
    {
        __IO    uint32_t    PERF_CTL;                                /* 0x50    Performance Control */
        DEV_NORC_PERF_CTL_Field    PERF_CTL_f;
    };
    union
    {
        __I     uint32_t    PERF_SUM;                                /* 0x54    Performance Summary */
        DEV_NORC_PERF_SUM_Field    PERF_SUM_f;
    };
    union
    {
        __I     uint32_t    PERF_CNT;                                /* 0x58    Performance Counter */
        DEV_NORC_PERF_CNT_Field    PERF_CNT_f;
    };
} DEV_NORC_RegDef_f;
/****DEV_NORC end****/

/*******************************************************************************
 * User-defined Contents
 ******************************************************************************/



#endif
